A Combined Data and Power Management Infrastructure: For - download pdf or read online
By Jens Eickhoff (auth.), Jens Eickhoff (eds.)
This ebook describes the improvement and layout of a distinct mixed info and gear administration infrastructure The use in small satellites provides a few specific necessities to the platforms like capability failure robustness and dealing with of alternative forms of exterior analog and electronic interfaces. those necessities bring about a useful merge among On Board desktop and the satellite's energy keep an eye on and Distribution Unit, which leads to a truly cutting edge layout or even a patent association. This ebook presents process engineers and college scholars with the technical wisdom as combine among technical brochure and a person guide.
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This ebook describes the advance and layout of a special mixed information and gear administration infrastructure The use in small satellites provides a few specific standards to the structures like capability failure robustness and dealing with of other varieties of exterior analog and electronic interfaces.
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Additional resources for A Combined Data and Power Management Infrastructure: For Small Satellites
The latter then activates platform AOCS units to achieve a stable SC safe-mode attitude acquisition and potential ground contact through activation of the transceivers. As summary in these cases reboot and configuration are initiated by the PCDU controller and again PCDU controller and Reconfiguration Unit together manage the recovery. 2 Innovation: A Combined-Controller for all FDIR Functions In a classic unit architecture on board three controllers implement the functionality, namely the OBC’s Reconfiguration Unit  and as subunit the OBC’s Command Pulse Decoding Unit (CPDU)  as well as the PCDU’s internal controller IC.
All of these requirements are important and are considered very carefully before a processor is chosen for any satellite program. For the FLP satellite’s OBC Processor-Board, the Aeroflex UT699 LEON3FT processor was chosen (Fig. 3). This processor is highly suited for satellite applications based on all of the above criteria. The LEON3FT is a 32 bit SPARCTM V8 device with many interfaces suitable for multiple types of implementations. For the FLP satellite program, it was decided at the program level to use SpaceWire as the primary interface between all of the boards in the OBC unit.
Details on this card can be found in Sect. 1. 2 The OBC Processor-Boards 41 The Ethernet interface on the LEON3FT is implemented by routing the signals from the LEON3FT to the 44 pin D-sub connector. During debug the user will use the DSU/Ethernet Interface card to implement the Ethernet connection. The LEON3FT microprocessor on the OBC Processor-Board also has a Debug Support Unit (DSU) on the device and these signals are routed on the SBC to the 44 pin D-sub connector. When attempting to access the DSU, the user will use the DSU/Ethernet Interface card.
A Combined Data and Power Management Infrastructure: For Small Satellites by Jens Eickhoff (auth.), Jens Eickhoff (eds.)